1. Field of Invention
The invention relates to digital imaging with time-to-threshold A/D conversion, particularly to low-cost, low-complexity structures for converting analog sensor outputs to digital indicator signals in CMOS image sensor arrays. In CMOS image sensor arrays, the sensors are photodetectors.
2. Description of Prior Art
Many digital imaging systems employ arrays of sensors. Often, the arrays consist of rows and columns of sensors. The sensors are exposed to incident energy either simultaneously or nearly so. The incident energy causes physical parameters of the sensors to change, typically analog electrical parameters such as currents or voltages. Subsequently, the parameter changes are converted into digital number values using some form of analog-to-digital (A/D) conversion.
In much of the prior art, digital imaging systems use essentially the same approach as film-based cameras. The sensors are configured to produce an output change proportional to the cumulative incident energy during a common exposure time of pre-selected duration. A/D conversion takes place after exposure and outside the array boundaries.
For CCD imaging systems, this external A/D conversion is necessary because CCD arrays and mixed-signal A/D converters are fabricated using different manufacturing processes and consequently are on separate chips. However, in CMOS technologies, it is possible to co-fabricate sensors and other circuitry on a single chip.
When A/D conversion is a separate process from analog signal acquisition, one can use a general-purpose A/D converter. Such converters are widely known in the prior art, and are general-purpose because they do not rely on specific knowledge of how analog inputs are acquired. Given a voltage or a current in a specified range as an analog input, they provide a digital output with a specified number of bits of precision in a specified amount of time.
There are numerous types of general purpose A/D converters, including those based on charge-balancing, on successive approximation, and on flash or half-flash techniques. Choice of a particular strategy usually involves a trade-off between cost and speed or precision, where cost may be measured in terms of chip space, power consumption, or extra manufacturing steps (such as laser trimming to match components, or tuning using floating gates).
As an example, consider flash conversion. The basic idea of flash conversion is to simultaneously compare an unknown analog input to a set of known reference levels. Usually the levels are uniformly spaced. For each level a comparator indicates whether it is greater than or less than the unknown analog input. The set of comparator outputs forms a thermometric code that is interpreted much the same way as the markings on an old-fashioned glass thermometer.
A flash converter with N bits of precision requires (2^N−1) comparators and known reference levels. Traditionally, the reference levels were generated using a chain of 2^N resistors strung between minimum and maximum reference voltages. Except for the end resistors, all the resistors have the same value. (See, for example, FIG. 9.49 on page 621 of THE ART OF ELECTRONICS, fourth edition.)
In practice, such resistors aren't perfectly matched, which is an impediment to high-precision conversion. An even greater impediment is the exponential component count.
One clever flash converter idea that is apropos to the present work is the so-called “threshold inverter quantizer” (TIQ) proposed by K. Choi and his colleagues at Penn State University. They recognized that matched resistors are quite costly to produce in CMOS—being physically very large and/or needful of trimming—whereas transistors with accurate width-to-length ratios are both cheaper (e.g. smaller) and easier to produce.
Consequently, Choi et al. put forth the idea of replacing the resistor chain and comparators with a set of scaled CMOS inverters. Each inverter has one input, but component transistors scaled to provide digital output transitions at different input levels—a useful departure from the standard practice of designing inverters to switch mid-way between their power supply rails. Notwithstanding the improvement over traditional flash converter architectures, the approach suffers from an increasing average inverter size as precision increases and also from exponential component count.
Generally speaking, fast, high-precision A/D converters are much more costly than slow, high-precision A/D converters or fast, low-precision A/D converters. Unfortunately, digital imaging arrays with millions or tens of millions of sensors may require large numbers of conversion operations in very short time intervals. Hence some form of fast, high-precision A/D conversion is very desirable.
Time-to-threshold A/D conversion exploits some of the unique features of digital imaging systems, in particular sensors that act as integrators. With time-to-threshold A/D conversion in a digital imaging system, a digital number value is generated as a measured elapsed time required for a sensor output to change from some initial level to some threshold level. This type of A/D conversion is well-suited to parallel implementations and occurs in real time as the sensors are being exposed to incident energy.
Several U.S. patents describe various types of time-to-threshold A/D conversion for digital imaging, including U.S. Pat. No. 5,650,643 issued to K. Konuma, U.S. Pat. No. 6,587,145 issued to A. Hou, and U.S. Pat. No. 6,559,788 issued to C. Murphy. The advantages and disadvantages of some of these patents are described in U.S. Pat. No. 6,680,498 issued to R. Guidash.
Konuma proposed having a master clock signal passed into an array, with each sensor's output governing a dedicated counter. Massive counter redundancy leading to high power consumption and large chip area is a major disadvantage of this approach.
Hou proposed a two-transistor comparator with two inputs—one from a pinned photodiode, applied at the gate of one transistor, and the other from an array-external reference source passed into the array and applied to the gate of the other transistor. The two transistors pass current simultaneously, in effect wrestling for control of a common circuit node which is the comparator output. This leads to high power consumption. Also, the accuracy of the reference signal in setting the threshold level depends on the relative gains of the component transistors.
Another patent, U.S. Pat. No. 5,461,425 issued to B. Fowler and A. El Gamal, describes an early proposal for putting A/D converters in an imaging array as a way of avoiding having to pass analog signals to array-external A/D converters. However, their proposed A/D converters are still quite costly, and not based on time-to-threshold conversion.
There is clearly a need for circuits that enable time-to-threshold A/D conversion with very low cost—by part count, part size, power consumption, and other measures.